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ci: build, smoke-test and publish the Xiongmai openipc-xm images - #14
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build-xm.yml has build-hisilicon.yml's shape: resolve the openipc-xm revision once, build xm510/xm530/xm550 one per leg with the 256 KiB NOR fit check, build qemu-hisilicon once, smoke-test every image, then release (own `xiongmai` tag) and publish (OpenIPC/firmware latest plus the openipc.org report) on dispatch only. Every SoC has a qemu-hisilicon machine, so none is held. The smoke test boots each NOR image in place from an 8 MiB flash image twice, with the part powering up under the per-block protection Xiongmai bootloaders leave on (xm-sfc.wps): it passes on the autoboot prompt, and fails if the second boot finds a bad environment CRC -- the first boot's saveenv dropped because the driver did not clear the protection. Checked locally with the smoke script as written, against qemu-hisilicon with u-boot#150. The pull_request trigger is limited to changes to this file, so other openipc pull requests do not start the xiongmai matrix. publish shares build-hisilicon's concurrency group; openipc.org keeps the newest uboot build per file name, so the two workflows' pushes do not displace each other's files. README and CLAUDE.md describe the openipc-xm branch and the workflow.
PR Summary by QodoBuild, smoke-test, and publish Xiongmai U-Boot images
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Files changed (3)
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Code Review by Qodo
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…sh fill - The partition-fit check compares bytes: dividing by 1024 first let an image up to 1023 bytes past 256 KiB through, into the environment. - The erased 8 MiB flash image comes from a finite dd | tr, not an infinite tr cut off by head, which dies of SIGPIPE under pipefail.
OpenIPC/u-boot-xmedia stopped publishing on 2026-10-16 (#14), and OpenIPC/firmware `latest` has carried this tree's -nor/-nand builds of its SoCs since (hi3516ev200/ev300, hi3518ev300, hi3516dv200, the gk7205v200 family, gk7205v500/v510/v530). Their fmc100 ID tables lacked 36 SPI NAND and 8 SPI NOR chips the xmedia builds identified, so a camera with one of them lost its flash: a NAND U-Boot found "0 MiB", a NOR U-Boot fell back to another vendor's profile, or to "unknown", 4 MiB. SPI NAND, appended after the existing entries (the driver takes the first ID-prefix match, so they cannot shadow one above): Micron MT29F1G01ABA/ABB, MT29F2G01ABA/ABB, MT29F4G01ADAG/ABBFDWB; GigaDevice GD5F1GM7UEYIG (xmedia 6910ce1a9), GD5F1GQ4UAYIG, GD5F2GQ4UAYIG, GD5F4GQ4UAYIG, GD5F4GQ4RAYIG, GD5F4GQ4RBYIG, GD5F4GQ6RE9IG; ESMT F50L512M41A, F50L1G41A, F50L1G41LB-104YG2ME; Winbond W25N02JWZEIF, W25N02KVZEIR; Macronix MX35LF2GE4AB, MX35LF2G24AD, MX35UF4GE4AD; ATO ATO25D1GA; Paragon PN26G01A/G02A; Foresee FM25S01-DND-A-G, FM25S01A; ALLIANCE AFS1GQ4UAC/AFS2GQ4UAD; Toshiba TH58CYG3S0H; HeYangTek HYF1GQ4UAACAE, HYF2GQ4UAACAE, HYF4GQ4UAACBE; Etron EM73C044VCC-H, EM78D044VCF-H, EM78E044VCA-H, EM78F044VCA-H. Skipped as already identified by an existing entry with the same ID: GD5F2GQ4U9IGR/BYIG, XT26G01B, and the 31 chips both tables share. The read/write/erase ops the new entries use are declared with the others. SPI NOR (longest exact ID match wins, so order does not matter): S25FL256S, XT25F16BSSIGU, MT25QL256A, F25L64QA, GD25Q256, W25Q256JW-IQ, W25Q256JWFIM, W25Q512NW-IM (xmedia 31f87ca2b and later). F25L64QA used xmedia's spi_driver_f25l64q, whose fields equal spi_driver_no_qe, so it uses that. The NOR clock limits (CONFIG_FMC_SPI_NOR_*_CLK_MAX) apply to them as to every entry. Entries copied from OpenIPC/u-boot-xmedia master (bfbba0e5a); driver cores (fmc100.c, fmc100_spi_general.c, the spi_nand_info and spi_nor_info structs) match between the trees. Checked in qemu-hisilicon, the FMC's READ_ID overridden with -global hisi-fmc.nand-jedec / flash-jedec, published latest U-Boot vs this build: - SPI NAND, gk7205v200, hi3516ev300 and gk7205v500: GD5F1GM7 (0xc8 0x91, the model's default), GD5F1GQ4UAYIG (0xc8 0xf1), MT29F2G01ABA (0x2c 0x24), W25N02KV (0xef 0xaa 0x22): published "0 MiB", this build 'Name:"..."' and 128/256 MiB; W25N01GV (0xef 0xaa 0x21) 128 MiB on both. GD5F4GQ6RE9IG (0xc8 0x45), hi3516ev300 and gk7205v200: published 'Cannot found a valid SPI Nand Device', this build 'Name:"GD5F4GQ6RE9IG"'. - SPI NOR, hi3516ev300 and gk7205v200: W25Q256JW (0xef 0x60 0x19) and W25Q512NW (0xef 0x80 0x20) published "unknown" 4MB, this build 32MB / 64MB; GD25Q256 and XT25F16B published under W25Q256JVFIQ / GD25Q16ESIG, this build under their own names; W25Q128 unchanged. hi3516ev300, gk7205v200, gk7205v500 and hi3516cv300 build (NOR, NAND), within their boot areas, with no new warnings. Not run on hardware.
Adds
build-xm.ymlfor the newopenipc-xmbranch (#13), the same shape asbuild-hisilicon.yml:resolve→build(xm510/xm530/xm550, NOR fit check ≤ 256 KiB) →qemu→qemu_smoke→release/publish. Release and publish run on dispatch only.hold: every SoC has a qemu-hisilicon machine, so every image is smoke-tested and gated.xm-sfc.wps, qemu-hisilicon#150).Hit Ctrl-C.saveenvwas dropped because the driver didn't clear the protection.releaseuploads to a newxiongmaitag.publishuploads to OpenIPC/firmwarelatest(nou-boot-xm*names there today) and reports--source ubootto openipc.org with auboot-xm-…build id, sharing hisilicon's concurrency group.pull_requestruns only when this workflow file changes, so otheropenipcPRs don't start the xiongmai matrix.Checked locally: the smoke script as written passes on all three SoCs against qemu-hisilicon master. This PR's own run builds the current
openipc-xm.